Hollow wire and method for making the same

ABSTRACT

A hollow wire for enhancing the wires used in Liquid Crystal Display and a method for making the hollow wire which includes hollow portions in the wires so as to increase the cross sectional area and reduce the resistance. Isolation layer with low dielectric constant is filled in the hollow portions so as to reduce the electric capacities and maintain the operation efficiency. The isolation layer can be filled in the perpendicularly crossing area between the information lines and gate matrixes to reduce the electric capacities and maintain the operation efficiency.

FIELD OF THE INVENTION

The present invention relates to a multi-metal wire used in semi-conductors and the hollow wire reduces the series resistance of the wire together with the parasitic capacitance between the wires and improves the operation efficiency.

BACKGROUND OF THE INVENTION

A higher standard and quality is requested for the audio and video equipment due to rapid progress of multiple media, conventional monitors made of Cathode Ray Tube (CRT) are not satisfied besides requests of thin, compact and durable designs. Plasma Display Panels (PDP), Liquid Crystal Displays (LCD) or Field Emitting Displays (FED) gradually replace the Cathode Ray Tube (CRT) in the market.

The cross section area of the metal wires and the correspondent gaps between them in the Liquid Crystal Displays (LCD) have to be narrowed due to the increase of the pixels. However, the series resistance of the wires and the parasitic capacitance between the wires are increased when the cross sections and the gaps are narrowed, and the interruption of series capacitance between wires are more seriously concerned.

A multiplayer of wire having more cross areas is used to reduce the resistance, such as disclosed in Taiwan Patent No. 533325. According to the Skin Effect, the electric charges move along the surface of the conductive objects so that the depth of the conductive objects is increased so as to maintain the narrow gaps between the wires and this becomes multi-layer structure which is deemed to be material-consuming design. When a thick wire is perpendicularly and alternatively located between the information line and gate matrixes causes protrusion on the surface and is difficult to be manufactured. It is also possible to reduce the operation efficiency of the LCDs because of the cross-talk noise due to the too close of distance between the wires.

Conventional way of arrangement of wires of LCDs results in high resistance, lower operation efficiency and interruption of series capacitance, and these affect the quality of the LCDs. This invention improves the shortcomings.

SUMMARY OF THE INVENTION

The present invention relates to a hollow wire that improves the shortcomings of series resistance and interruption by capacitance.

The main character for achieving the above mentioned purposes is that the hollow wire of the present invention comprises a base board and a first main wire and a plurality sections of separated and co-axial first sub-wires are located on the base board. Conductive material is respectively located on two ends of the first main wire and the first sub-wires. The top surfaces of the conductive material is flush with each other. A plurality of second sub-wires are axially formed on the top the conductive material on the first main wire. A second main wire is connected across the conductive material on the first sub-wires and the first main wire is located beneath the second main wire. The hollow wire includes upper layer wires and lower layer of wires which are alternatively arranged with the upper layer of wires.

Another object of the present invention is to provide a method for making the hollow wire which reduces both the series resistance and the interruption of capacitance and improves the operation efficiency.

In addition, the following steps are taken to manufacture the hollow wire of the present invention:

A. Coating a Metal Layer

A first metal layer 20 is coated on a semi conductor base board;

B. Making Wires

The first metal layer is defined with the first main wire and the first sub-wires which are located on the same axis and separated by the first main wire.

C. Coating Isolation Layer

An isolation layer is coated on the base board and covers the first main wire and the first sub-wires.

D. Defining Recesses

Several recesses are defined in the isolation layer and located corresponding to the two ends of the first main wire and the second sub-wires. A separation block is located between the two recesses located on the two ends of the first main wire such that the upper layer of metal wires form separated hollow portions.

E. Forming Conductive Material

Conductive material is filled in the recesses.

F. Making Metal Layer

A second metal layer is coated on the isolation layer and covers and connected with the conductive material.

G Forming Wires

The second metal layer includes a second main wire and a plurality of sections of second sub-wires which share the same axis and are in separate from each other. The second main wire perpendicularly located between the second sub-wires. The second main wire is located corresponding to the first sub-wires and the second sub-wires are located corresponding to the first main wire.

H. Removing the Isolation Layer

The isolation layer is removed.

The present invention will become more obvious from the following description when taken in connection with the accompanying drawings which show, for purposes of illustration only, a preferred embodiment in accordance with the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a first metal layer is coated on the base board;

FIG. 2 shows the etching of the first metal layer on the base board;

FIG. 3 shows an isolation layer is coated on the base board;

FIG. 4 shows recesses are defined in the isolation layer;

FIG. 5A shows conductive material is filled in the recesses;

FIG. 5B shows a part of the conductive material is removed from the recesses;

FIG. 6 shows a second metal layer is coated;

FIG. 7 shows the etching process is to be proceeded to the second metal layer;

FIG. 8 shows the etching of the second metal layer, and FIG. 9 shows the final status of the hollow wire of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to FIG. 9, the hollow wire of the present invention comprises a base board 10 and a first main wire 21 and a plurality sections of separated first sub-wires 22 are located on the base board 10, wherein the first sub-wires 22 share the same axis and in separated from each other. Conductive material 40 is respectively located on two ends of the first main wire 21 and the first sub-wires 22. The top surfaces of the conductive material 40 are flush with each other. A plurality of second sub-wires 52 are axially formed on the top the conductive material 40 on the first main wire 21. A second main wire 51 is connected across the conductive material 40 on the first sub-wires 22 and the first main wire 21 is located beneath the second main wire 51 perpendicularly.

To achieve the structure mentioned above, the following steps are taken which are:

A. Coating a Metal Layer

Referring to FIG. 1, coating a first metal layer 20 on a semi conductor base board 10 by way of chemical or physical method. The base board 10 can be made by Silicon, Gallium Arsenide, Indium Phosphide, Gallium Nitride, Silicon Oxide, Silicon Carbide, Aluminum Oxide, or Zinc Oxide. The first metal layer 10 can be Aluminum, Aluminum alloy, Copper or Copper alloy.

B. Making Wires

Referring to FIG. 2, by using exposing and etching, the first metal layer 20 is defined with the first main wire 21 and the first sub-wires 22. The top of the first main wire 21 and the top of the first sub-wire 22 are in flush with each other.

C. Coating Isolation Layer

Referring to FIG. 3, an isolation layer 30 is coated on the base board 10 and covers the first main wire 21 and the first sub-wires 22. The thickness of the isolation layer 30 is thicker than that of the first main wire 21 and the first sub-wires 22. The isolation layer 30 can be Silicon Oxide, especially for ILD with low dielectric constant can be made by way of Tetraethoxysilane, Si(OC2H2)4 or Spin On Glass, SOG

D. Defining Recesses

Referring to FIG. 4, recesses 31 are defined in the isolation layer 30 and located corresponding to the two ends of the first main wire 21 and the second sub-wires 22. The first metal layer 20 at the two of the first main wire 21 and the second sub-wires 22 can be accessible such that upper layer of metal wires are connected therewith. A separation block 35 is located between the two recesses 31 located on the two ends of the first main wire 21 such that the upper layer of wires form separated hollow portions.

E. Forming Conductive Material

Referring to FIG. 5, after the recesses 31 are defined in the isolation layer 30, filling conductive material 40 in the recesses 31 by way of accumulation of crystals as shown in FIG. 5A. Surplus 41 are formed on the peripheries of the top of the conductive material 40 and then removed by way of CMP to obtain a flat surface as shown in FIG. 6. As shown in FIG. 5B, the conductive material 45 may have grooves 46 to save material. The surplus on the top surface of the conductive material 45 with grooves 46 can also be removed by way of CMP.

F. Making Metal Layer

Referring to FIG. 6, after the conductive material 40 is filled in the grooves 31 in the isolation layer 30, a second metal layer 50 is coated on the isolation layer 30 by way of chemical or physical crystal accumulation. The second metal layer 50 covers and connected with the conductive material 40.

G Forming Wires

As shown in FIGS. 7 and 8, by using exposing technique to form a second main wire 51 and a plurality of sections of second sub-wires 51 which share the same axis and are in separate from each other. The second main wire 51 perpendicularly located between the second sub-wires 51. The first main wire 51 and the first sub-wires 52 are in flush with each other on their top surfaces. The second main wire 51 is located corresponding to the first sub-wires 52 and are electrically connected to the first sub-wires 52 by the conductive material 40. The second sub-wires 52 are located corresponding to the first main wire 21 and are electrically connected to the first main wire 21 by the conductive material 40. The surplus portion of the second metal layer 50 is removed by way etching.

H. Removing the Isolation Layer

As shown in FIG. 9, the second main wire 51 and the second sub-wires 52 are formed in the second metal layer 50. The second main wire 51 is electrically connected to the first sub-wires 22, and the second sub-wires 52 are electrically connected to the first main wire 21. The isolation layer 30 is then removed.

Accordingly, the hollow wire includes upper layer of wires and lower layer of wires which are alternatively arranged with the upper layer of wires and by this specific arrangement, both the series resistance and the interruption of capacitance are reduced and the operation efficiency is improved.

The formula for calculating the resistance is R=ρ*L/A

Wherein R represents the resistance of the material, ρ represents the resistivity, L is the length of the wire and A is the cross sectional area of the wire.

If the wires are made Aluminum and Copper respectively, assuming that the length of the wires is 10, the thickness, the width and the cross sectional area are both 1, the resistance for the wire made of Aluminum is 26.7 μO, and the resistance for the wire made of Copper is 16.7 μO.

If Aluminum and Copper are respectively used to made the hollow wire of the present invention, as shown in FIG. 9, the cross area of the hollow area is 2 in length, 1 in depth and 1 in width. The two sub-wires 22, 52 are 4 in length, 1 in width and 8 in depth, the total length is 10 the same as the conventional wire. The resistance for the Aluminum is 8 μO and for the Copper is 5 μO.

It is noted that the hollow wire of the present invention has less resistance regardless of the ratio of length and width of the sub-wires.

While we have shown and described the embodiment in accordance with the present invention, it should be clear to those skilled in the art that further embodiments may be made without departing from the scope of the present invention. 

1. A hollow wire comprising: a base board; a first main wire and a plurality sections of first sub-wires connected on the base board, the first sub-wires sharing a common axis, and a second main wire and a plurality of sections of second sub-wires located above the first main wire and the first sub-wires, the second sub-wire electrically connected to the second main wire.
 2. The wire as claimed in claim 1, wherein the first main wire is located perpendicular to the second main wire.
 3. A hollow wire comprising: a base board, a first main wire and a plurality sections of separated and co-axial first sub-wires located on the base board, conductive material respectively located on two ends of the first main wire and the first sub-wires, a top surface of the conductive material is flush with each other, a plurality of second sub-wires axially formed on a top surface the conductive material on the first main wire, a second main wire connected across the conductive material on the first sub-wires and the first main wire located beneath the second main wire.
 4. The wire as claimed in claim 3, wherein the first main wire is located perpendicular to the second main wire.
 5. The wire as claimed in claim 3 or claim 4, wherein the first main wire, the first sub-wires, the second main wire and the second sub-wires are made by Aluminum.
 6. The wire as claimed in claim 3 or claim 4, wherein the first main wire, the first sub-wires, the second main wire and the second sub-wires are made by Copper.
 7. A method for making a hollow wire comprising the following steps: A. coating a metal layer: coating a first metal layer on a semi conductor base board; B. making wires: forming a first main wire and first sub-wires on the first metal layer, the first sub-wire located sharing a common axis and separated by the first main wire; C. coating isolation layer: coating an isolation layer on the base board and covering the first main wire and the first sub-wires; D. defining recesses: defining recesses in the isolation layer and the recesses located corresponding to two ends of the first main wire and the second sub-wires, a separation block located between the two recesses located on the two ends of the first main wire so as to form a hollow portion in the upper layer of wires; E. forming conductive material: filling conductive material in the recesses; F. making metal layer: coating a second metal layer on the isolation layer and covering and connected with the conductive material; G. forming wires: the second metal layer including a second main wire and a plurality of sections of second sub-wires which share a common axis and are in separate from each other, the second main wire perpendicularly located between the second sub-wires, the second main wire located corresponding to the first sub-wires and the second sub-wires located corresponding to the first main wire; H. removing the isolation layer.
 8. The method as claimed in claim 7, wherein the first metal layer and the second layer are coated by way of chemical accumulation.
 9. The method as claimed in claim 7, wherein the first metal layer and the second layer are coated by way of physical accumulation.
 10. The method as claimed in claim 7, wherein the first main wire and the first sub-wires are in flush with each on respective top surfaces thereof.
 11. The method as claimed in claim 7, wherein the second main wire and the second sub-wires are in flush with each on respective top surfaces thereof.
 12. The hollow wire as claimed in claim 7, 10 or 11, wherein the first main wire, the first sub-wires, the second main wire and the second sub-wires are made by Aluminum.
 13. The hollow wire as claimed in claim 7, 10 or 11, wherein the first main wire, the first sub-wires, the second main wire and the second sub-wires are made by Copper.
 14. The method as claimed in claim 7, wherein the isolation layer is thicker than that of the first main wire and the first sub-wires.
 15. The method as claimed in claim 7, wherein the isolation layer is an ILD layer with lower dielectric constant.
 16. The method as claimed in claim 15, wherein the isolation layer is made by way of Tetraethoxysilane, Si(OC2H2)4.
 17. The method as claimed in claim 15, wherein the isolation layer is made by way of or Spin On Glass, SOG.
 18. The method as claimed in claim 7, wherein the conductive material includes grooves and a surplus material on a top of the conductive material is removed by way of CMP. 